Job - Senior Digital Backend Engineer

职位

Senior Digital Backend Engineer

发布于 2025/12/25

Icon professional area

工程与制造

Icon book

通信/电子/半导体

Icon gps

上海

职位描述:

Role Overview
As a highly skilled and experienced senior digital backend engineer, you will be a key member in an international team, be responsible for leading the physical implementation of digital designs from synthesis to tape-out, with a strong emphasis on DFT (Design for Test) integration, timing closure, and physical verification, ensuring optimal performance, power, and area (PPA). You will collaborate across function teams to ensure high-quality, manufacturable silicon.

Key Responsibilities
Lead and execute backend implementation flows including floorplanning, placement, clock tree synthesis (CTS), routing, and physical verification.
Optimize designs for timing closure, power reduction, and area efficiency across multiple technology nodes.
Collaborate with front-end RTL designers to resolve timing and logic issues during synthesis and place-and-route.
Perform static timing analysis (STA), IR drop analysis, EM analysis, and signal integrity checks.
Drive DFT insertion, scan chain implementation, and support ATPG flows.
Manage physical verification processes including DRC, LVS, and antenna checks, ensuring tape-out readiness.
Interface with foundries and EDA vendors to resolve tool and technology-related issues.


The job requires the following qualifications:
☐ according to standard template*
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
5+ years of experience in digital backend design and physical implementation.
Strong proficiency in DFT flows, scan insertion, ATPG, and test coverage analysis.
Hands-on experience with EDA tools such as Synopsys ICC, PrimeTime, DFT Compiler
Solid understanding of ASIC design flow, including synthesis, P&R, STA, and physical verification.
Familiarity with scripting languages such as Tcl, Python, or Perl for flow automation.
Experience with low-power design techniques, including multi-voltage domains and power gating.
Knowledge of chip-level integration, packaging constraints, and bump planning.
Exposure with machine learning-based optimization in backend flows is a bonus.
Excellent problem-solving, communication, and teamwork skills.
Fluent read and write skill in English
工作经验
5-10年

行业部门

参考代码

24715

顾  问

了解工作世界的
所有新闻

知识中心
Icon email

推荐职位